In many situations, electronic binary logic circuitry is used to count through a sequence of more than ten states, the states representing consecutive decimal numbers. A primary example is in an electronic timekeeping device, in which an hours counter must count through states representing the hours 00 through 23. Other examples are an electronic weight measuring and display device in which an ounces counter counts through states representing 0 through 15 ounces, and an electronic length measuring and display device in which an inches counter counts through states representing 0 through 11 inches. In the interest of simplicity, this invention is described in terms of an electronic clock and other applications, which will be apparent to one skilled in the art, are mentioned when pertinent.
A typical electronic clock functions in the following basic way. The number of output cycles from a stable frequency source is counted and the total count is appropriately displayed. In a simple case, the frequency source is just the input 60 Hz power frequency from the normal household outlet, but in some scientific applications where great accuracy is required, more precise frequency sources are used. In fact, a regular plug-in electric clock works basically in this same way; the induction motor counts the 60 Hz frequency by revolving one turn for each input cycle, and the hands display the total number of turns of the motor in terms of hours, minutes, and seconds by means of the gearing between the motor and hands.
In the case of the electronic clock, the 60 Hz frequency is counted by means of binary logic circuits which operate in stages. The simplest stage is a divide-by-two counter (1/2). If the output of a first divide-by-two counter is connected to the input of a second divide-by-two counter, and its output is connected to a third counter, the three divide-by-two counters can be considered together to be a single divide-by-eight counter (1/8). That is, the outputs of the respective divide-by-two counters can be in any one of eight states from binary 0 (000) through binary 7 (111).
A basic divide-by-two counter is the J-K flip-flop. When the clock input goes from a logical one to logical zero, the outputs Q and Q change state depending upon the control inputs J and K. By means of these J and K inputs, it is possible to make interconnection among the stages of a multistage counter to make the counter skip certain counts. For example, in the three stage divide-by-eight (1/8) counter, it is possible to interconnect the J and K inputs and the outputs of the three stages to make the counter skip the binary 6 and 7 counts so as to count from binary 0 through 5. This new counter is a 1/6 counter. An important point is that one can just as easily make the counter skip any two counts out of the sequence 0 through 7 and still come up with a 1/6 counter. The only difference is that there is a different relation between the binary outputs from each stage and the actual number of input cycles counted.
Another important part of electronic clocks is the decoding and displaying of the count. For example, suppose we have a seconds counter (1 Hz input frequency) and we want to be able to count up to at least 1000 seconds. One way to do it is to connect 10 divide-by-two (1/2) counters to count from binary 0 through 1023. However, in order to display the decimal digits 000 through 999, this method requires an extremely complex decoder to convert the binary counter output to decimal form.
A much simpler way to accomplish the same thing is to work with four-stage divide-by-ten (1/10) counters and provide a decoder for each counter, e.g., for each decimal digit. Because there are ten decimal digits 0-9, there is a much simpler relationship between the four binary outputs of each of the 1/10 counters and the corresponding decimal digit. Even though more divide-by-two counters are required in the latter scheme, the latter is simpler and more economical way of decoding.
In the latter scheme, the decoders for each of the 1/10 stages are identical and are still fairly complex and comprise a sizable amount of the cost of the counter. A substantial savings can be realized by time-sharing a single decoder. With time sharing, digit select lines are repeatedly pulsed, one after the other, to simultaneously light a display tube and gate the corresponding bits into the decoder, thus time-sharing the single decoder among all the display tubes. The digit select lines are pulsed so fast that they display tubes all appear to be lit continuously.
In an electronic clock, it is necessary to count by 1/10 (seconds, minutes), by 1/6 (tens of seconds, tens of minutes), and by 1/12 or 1/24 (hours). There are particular problems with the 1/12 or 1/24 counter because there is not a one-to-one correspondence between the count and the displayed digit. For example, the units hours digit displayed must be "2" for both the 02 and the 12 hour counts, and in the case of a 24 hour clock, the 22 hour count.
Currently, there are several techniques used to sequence the counters prior to decoding and display. Primarily, binary-coded-decimal (BCD), but also excess-three codes and a few others are used. However, these other methods were all designed to facilitate binary arithmetic operations for computer applications and the like and hence are poorly suited to digital clock applications. For example, the binary representation of a number of BCD is the binary number equal to the represented decimal number. This is fine for adding numbers, but as will be explained in greater detail subsequently, the representations of 02 and 12 turn out to be logically dissimilar, causing problems of increased decoder complexity when displaying the hours digit "2" for both the hours 02 and 12.